Publications of Alp Arslan Bayrakci

2026

1. Akgun, M. E., & Bayrakci, A. A. (2026). A Lightweight Hardware Accelerator for Fixed-Point Least-Squares Estimation in RISC-V SoCs. In Proceedings of the 2026 8th International Congress on Human-Computer Interaction, Optimization and Robotic Applications (ICHORA), pp. 1–7.
2. Abdulhalik, E., Baytekin, M. E., Terci, G. S., Bayrakci, A. A., & Turan, A. (2026). A Modular Graph Coloring Abstraction for Register Allocation in LLVM: Design and Evaluation. In Proceedings of the 2026 8th International Congress on Human-Computer Interaction, Optimization and Robotic Applications (ICHORA), pp. 1–7.

2024

1. Terci, G. S., Abdulhalik, E., Bayrakci, A. A., & Boz, B. (2024). BitEA: BitVertex Evolutionary Algorithm to Enhance Performance for Register Allocation. IEEE Access, 12, 115497–115514. https://doi.org/10.1109/ACCESS.2024.3446596
2. Bekar, F., & Bayrakci, A. A. (2024). Hybrid Cost-Effective Decapsulation of Chips for Successful Laser Fault Injection. In Proceedings of the 2024 17th International Conference on Information Security and Cryptology (ISCTürkiye), pp. 1–6.
3. Kocausta, B., Terci, G. S., & Bayrakci, A. A. (2024). Parallelization of BitColor Algorithm via Multithreading and GPU for Graph Coloring. In Proceedings of the 2024 9th International Conference on Computer Science and Engineering (UBMK), pp. 1–6.

2023

1. Esirci, F. N., & Bayrakci, A. A. (2023). Delay based hardware Trojan detection exploiting spatial correlations to suppress variations. Integration, 91, 107–118. https://doi.org/10.1016/j.vlsi.2023.03.006
2. Terci, G. S., & Bayrakci, A. A. (2023). Integer Point Enumeration in Multi-Dimensional Geometric Objects with FPGA Acceleration. In Proceedings of the 2023 14th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1–5. (Best Paper Award)
3. Esirci, F. N., Mutlu, H., & Bayrakci, A. A. (2023). FPGA Based Verification for the Difficulty of Delay Based Hardware Trojan Detection. In Proceedings of the 2023 14th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1–5.

2021

1. Erer, G. N., & Bayrakci, A. A. (2021). PLODE: Precise Logic and Delay Simulator for Structural Verilog. In Proceedings of the 2021 13th International Conference on Electrical and Electronics Engineering (ELECO), pp. 172–176.

2019

1. Bayrakci, A. A. (2019). FPGA Based Low Cost Automatic Test Equipment for Digital Circuits. Electrica, 19(1), 12–21. https://doi.org/10.26650/electrica.2018.28093
2. Kocabas, M., & Bayrakci, A. A. (2019). Quantification of Power Based Hardware Trojan Detection Under Realistic Variations and Separation of Power Supplies. In Proceedings of the 2019 11th International Conference on Electrical and Electronics Engineering (ELECO), pp. 522–526.
3. Esirci, F. N., & Bayrakci, A. A. (2019). Acceleration of Spatial Correlation Based Hardware Trojan Detection Using Shared Grids Ratio. In Mathematical Aspects of Computer and Information Sciences, pp. 187–201. Springer. https://doi.org/10.1007/978-3-030-43120-4_15

2017

1. Esirci, F. N., & Bayrakci, A. A. (2017). Hardware Trojan detection based on correlated path delays in defiance of variations with spatial correlations. In Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 163–168. https://doi.org/10.23919/DATE.2017.7926976
2. Bayrakci, A. A. (2017). ELATE: Embedded low cost automatic test equipment for FPGA based testing of digital circuits. In Proceedings of the 2017 10th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1281–1285.

2016

1. Bayrakci, A. A. (2016). Accelerated Accurate Timing Yield Estimation Based on Control Variates and Importance Sampling. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(8), 2787–2798. https://doi.org/10.1109/TVLSI.2016.2521541

2015

1. Bayrakci, A. A. (2015). Stochastic logical effort as a variation aware delay model to estimate timing yield. Integration, 48, 101–108.

2014

1. Ulutaş, H., & Bayrakci, A. A. (2014). HCS12 EmumiS: Virtual HCS12 Development Tool (HCS12 EmumiS: Sanal HCS12 Geliştirme Aracı). In Proceedings of the 2014 Elektrik-Elektronik-Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO 2014), Bursa, Türkiye.

2013

1. Bayrakci, A. A. (2013). On the accuracy of Monte Carlo yield estimators. In Proceedings of the 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC), pp. 56–57. https://doi.org/10.1109/VLSI-SoC.2013.6673247

2010

1. Bayrakci, A. A. (2010). Fast and accurate statistical timing analysis of digital circuits for timing yield estimation based on transistor level simulations (Doctoral dissertation). Koç University, Turkey.

2. Bayrakci, A. A., Demir, A., & Tasiran, S. (2010). Fast Monte Carlo estimation of timing yield with importance sampling and transistor-level circuit simulation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29(9), 1328–1341.

2008

1. Bayrakci, A. A., Demir, A., & Tasiran, S. (2008). Fast Monte Carlo estimation of timing yield: Importance sampling with stochastic logical effort (ISLE). arXiv preprint arXiv:0805.2627.

2007

1. Bayrakci, A. A., & Akkas, A. (2007). Reduced delay BCD adder. In Proceedings of the 2007 IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 266–271. https://doi.org/10.1109/ASAP.2007.4429991

Ders Kodu	Ders Adı

1. 891159, FATMA NUR ESİRCİ ORAL, 2024 Konumsal korelasyon kullanarak varyasyonları baskılayan gecikme temelli donanımsal Truva atı tespiti, Suppressing variations by spatial correlations to avail delay-based hardware Trojan detection Doktora Bilgisayar Mühendisliği Bilimleri-Bilgisayar ve Kontrol = Computer Engineering and Computer Science and Control

2. 768167, KADİR KÖSE, 2022 FPGA, GPU ve CPU'nun örnek bir problem üzerinde performans karşılaştırmaları Performance comparisons of FPGA, GPU and CPU on an example problem Yüksek Lisans Bilgisayar Mühendisliği Bilimleri-Bilgisayar ve Kontrol = Computer Engineering and Computer Science and Control

3. 678270, MEHMET KOCABAŞ, 2021, Hardware Trojan horse detection with side channel analysis based on power consumption Güç tüketim tabanlı yan kanal analizi kullanılarak donanımsal Truva atı tespiti Yüksek Lisans Bilgisayar Mühendisliği Bilimleri-Bilgisayar ve Kontrol = Computer Engineering and Computer Science and Control

4. 492624, FATMA NUR ESİRCİ, 2018, Gecikme temelli yan-kanal analizi yöntemleri kullanarak donanımsal truva atı tespiti, Hardware trojan detection using delay based side-channel analysis methods

• Doktora: Direct Ph. D. 2010, Department of Computer Engineering, Koc University, Turkey
• Yüksek lisans:
• Lisans: B.S. 2004, Department of Electrical and Electronics Engineering, Middle East Technical University, Turkey